Decomposition & Functional Verification of Fsms 1
نویسندگان
چکیده
In this paper we present a new method for the decomposition of a Finite State Machine (FSM) into a network of interacting FSMs and a framework for the functional veriication and simulation of the FSM network at diierent levels of abstraction. The problem of decomposition is solved using a multiway graph partitioning technique. The number of submachines is determined dynamically during the partitioning process. The veriication algorithm is used to verify the correctness of the FSM network at any stage of the synthesis process. It can be used to verify (a) the result of FSM decomposition on a behavioral level, (b) the encoded FSM network, and (c) the network after logic optimization. Our veriication technique is based on an eecient enumeration-simulation method which involves traversal of the state transition graph of the prototype machine in a depth rst fashion and simulation of the decomposed machine network. Both the decompostion and veriication/simulation algorithms have been implemented as a computer system and tested on a set of benchmark examples.
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